1. Field of the Invention
The present invention relates to a multilayer printed circuit board, and in particular to an improved shape of a clearance formed on a through-hole area of a power supply layer of a multilayer printed circuit board.
2. Description of the Prior Art
The power supply layer of the multilayer printed circuit board has a clearance (a portion cleared of conductors) in the through-hole portion for the purpose of avoiding shortcircuit between a power layer conductor and a through-hole conductor. Conventional multilayer printed circuit boards have round-shaped clearances or quadrangle clearances with four right-angled corners. For example, round-shaped clearances are disclosed in Japanese Patent Unexamined Publication No. 121168/74.
As LSI's become higher in speed and density, multilayer printed circuit boards for mounting the LSI's also become larger in density and area. When a number of electric components including LSI's are mounted with high density on multilayer printed circuit boards having higher component densities and larger areas, the current supplied to the electric components becomes extremely large. Accordingly, the resistance of the power supply layer must be made sufficiently small to suppress the voltage drop across the power supply layer. For this purpose, it is effective to decrease the area of the clearance formed in the power supply layer.
Meanwhile, more strict conditions of dimension deviation such as deviation in lamination or deviation in hole forming position are imposed on a multilayer printed circuit board having a higher component density and a larger area. The size of the clearance of the power supply layer must be determined by taking the above described fact into full consideration. If the size of the clearance is too small, shortcircuit failures between the through-hole and the power supply layer conductor due to dimension deviation caused during the manufacturing process are increased, resulting in a lowered productivity of the multilayer printed circuit board.